Transistor Network
Mostrando 1-5 de 5 artigos, teses e dissertações.
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1. An FET-based microwave active circuit with dual-band negative group delay
Recent studies proved that certain electronic active circuits are capable to exhibit simultaneously a negative group delay (NGD) and amplification in microwave frequency bands. One of the simplest topologies generating this counterintuitive NGD function effect is formed by a series RLC-network in cascade with a transistor. By using this cell, similar to the
Journal of Microwaves, Optoelectronics and Electromagnetic Applications. Publicado em: 2011-12
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2. Modeling and simulation of device variability and reliability at the electrical level
In nanometer scale complementary metal-oxide-semiconductor (CMOS) parameter variations pose a challenge for the design of high yield integrated circuits. This work presents models that were developed to represent physical variations affecting Deep- Submicron (DSM) transistors and computationally efficient methodologies for simulating these devices using Elec
IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia. Publicado em: 2011
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3. An estimation method for gate delay variability in nanometer CMOS technology
In the nanoscale regime of VLSI technology, circuit performance is increasingly affected by variational effects such as process variations, power supply noise, coupling noise and temperature changes. Manufacturing variations may lead to significant discrepancies between designed and fabricated integrated circuits. Due to the shrinking of design dimensions, t
IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia. Publicado em: 2010
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4. Automatic generation and evaluation of transistor networks in different logic styles / Geração automática e avaliação de redes de transistores em diferentes estilos lógicos
Currently, VLSI design has established a dominant role in the electronics industry. Automated tools have enabled designers to manipulate more transistors on a design project and shorten the design cycle. In particular, logic synthesis tools have contributed significantly to reduce the design cycle time. In full-custom designs, manual generation of transistor
IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia. Publicado em: 2008
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5. Noninvasive neuroelectronic interfacing with synaptically connected snail neurons immobilized on a semiconductor chip
A hybrid circuit of a semiconductor chip and synaptically connected neurons was implemented and characterized. Individual nerve cells from the snail Lymnaea stagnalis were immobilized on a silicon chip by microscopic picket fences of polyimide. The cells formed a network with electrical synapses after outgrowth in brain conditioned medium. Pairs of neurons w
The National Academy of Sciences.