InserÃÃo automÃtica de mecanismos de tolerÃncia a falhas em direÃÃes VHDL

AUTOR(ES)

Ana Carla dos Oliveira Santos

DATA DE PUBLICAÇÃO

2002

RESUMO

With the ever increasing use of computer systems, people are becoming more and more dependent on machines. If this dependency gets stronger, the damage in the occurrence of failure in these systems gets larger and so does the demand for reliability. Then, in a critical system, it is necessary to use mechanisms for dealing with problems that potentially affect systemâs operation. Fault tolerance is one of these mechanisms. Being tolerant to systemsâ faults means admitting that faults are unavoidable and being able to keep the system running even in the presence of those faults. The development of embedded systems is getting more systematic with the use of design methodologies. A way to improve design methodologies is to provide automatic tools to assist designers during product development. The main advantages of these tools are that they are usually well tested and robust, avoiding the insertion of human errors during design phases that are no longer manual, but automatic and correct by construction. Despite the advance of automation methodologies in the area, the application of fault tolerance techniques is still handmade and, to the best of our knowledge, no tools have been developed to assist the designer in this phase of the project development. Analyzing the required reliability, choosing the more suitable techniques and applying them to the project are tasks that, nowadays, rely on the development team experience. The natural tendency, however, is to have those development phases gradually becoming automated or at least aided by tools, which would, combined with the knowledge and experience of developers, make the design of fault tolerant embedded systems more stable and reliable. This dissertation presents a method of developing fault tolerant embedded systems. The approach used in this work was the implementation of ToleranSE, a tool which insert fault tolerant mechanisms into embedded systems specifications. The goal is to show the viability of using an automatic method to implement fault tolerance mechanisms during embedded systems development

ASSUNTO(S)

toleranse - tolerÃncia a falhas ciencia da computacao direÃÃes vhdl funcionamento de sistema

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